BibTeX:

@article{IJIRSTV1I7032,
     title={Achievable Rate for Different Marker Codes and LDPC Code Design },
     author={K. Harisudha, Duarai Sivakumar and S.Latha Bhuvaneshwari},
     journal={International Journal for Innovative Research in Science & Technology},
     volume={1},
     number={7},
     pages={326--332},
     year={},
     url={http://www.ijirst.org/articles/IJIRSTV1I7032.pdf},
     publisher={IJIRST (International Journal for Innovative Research in Science & Technology)},
}

Many models for insertion/deletion channels are proposed and studied in the literature. In this paper, we consider binary channels impaired by independent and identically distributed (i.i.d.) insertion and deletion errors, whose positions are unknown to either the transmitter or the receiver. An interleaved serial concatenation of an outer low density parity check code (LDPC) for error-correction with an inner marker code for synchronization was proposed. We implemented a single pass decoding algorithm, that is, marker code-based synchronization is performed only once per received packet to limit the decoding latency. Multi pass decoding algorithm is used when decoding latency is not an issue. Then we introduced an algorithm that works on groups of bits called symbol level synchronization algorithm, which improves the achievable rate.

Insertion/Deletion Channel, Marker Codes, Synchronization, LDPC Code Design.